A low power mode and feedback arrangement for a switching power converter. Two or more main power switches. such as transistors, transfer energy from a supply to load by their opening and closing. When the load requires a relatively low power level, this condition is detected. In response, one or more of the transistor switches is disabled from switching and the reduced power requirements of the load are handled by the remaining one or more transistor switches. As a result, switching losses are reduced. This is because parasitic gate capacitance and on-resistance associated with the disabled switches no longer consume power from the power source. However, when additional power is required, one or more previously disabled switches may be brought back into play to ensure that the power requirements of the load are met. |