Original document(30 pages)  中文版
    A computer system includes processor having dual execution cores and a non-volatile memory that stores an error recovery routine. The processor's execution cores operate in lock step when the processor is in a redundant execution mode, and they operate independently when the processor is in a split execution mode. The error recovery routine is invoked when the processor detects a soft error while operating in the redundant execution mode. The error recovery routine switches the processor to split execution mode. In split mode, each execution core saves uncorrupted processor state data to a designated memory location and updates any corrupted data with corresponding processor state data from the other execution core. The error recovery routine returns the processor to redundant mode, initializes each execution core with the recovered processor state data, and returns control of the processor to the program thread that was executing when the soft error was detected.
Application Number
申请号
00819142 Application Date
申请日
2000.10.04
Title 名称 Firmware mechanism for correcting soft errors
Publication Number
公开号
1434941 Publication Date
公开日
2003.08.06
Approval Pub. Date Granted Pub. Date
International Classification 分类号 G06F11/16
Applicant(s) Name
申请人
Intel Corp.
Address 地址
Inventor(s) Name 发明人 N.T. Quach
Attorney & Agent 代理人 wu limeng wang yong
More information 更  多  信  息


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