Original document(21 pages)  中文版
    A process for preparing nano-volatile memory includes generating a planar doped region in substrate, a mask layer and a patterned photoresist layer, etching the mask layer to form multiple channels in substrate to divide said planar doped region and generate multiple bit lines, removing the patterned photoresist layer, repairing by the mask layer, removing mask layer to form a dielectric layer on substrate, and generating multiple word lines on the dielectric layer.
Application Number
申请号		 02103140 Application Date
申请日		 2002.01.31
Title 名称 Non-volatile internal memory structure and mfg. method thereof
Publication Number
公开号		 1435874 Publication Date
公开日		 2003.08.13
Approval Pub. Date Granted Pub. Date
International Classification 分类号 H01L21/82,H01L21/8239,H01L27/10
Applicant(s) Name
申请人		 Wanghong Electronic Co., Ltd.
Address 地址
Inventor(s) Name 发明人 Lai Hanzhao, Lin Hongde
Attorney & Agent 代理人 wang huaqiang
More information 更  多  信  息


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