Original document(13 pages) Authorized document(13 pages) 中文版
    A process for preparing the selectively local self-alignment silicide includes covering a common barrier layer on the memory unit region with more narrow gaps, generating another barrier layer on substrate to cover the memory unit region and logic circuit region, and back etchnig to expose the polysilicon gate and silicon substrate, where said self-alignment silicide is formed, and selectively generating the local self-alignment silicide.
Application Number
申请号		 02103165 Application Date
申请日		 2002.02.01
Title 名称 Method for mfg. selective local self-aligned silicide
Publication Number
公开号		 1435875 Publication Date
公开日		 2003.08.13
Approval Pub. Date 2007.09.19 Granted Pub. Date 2007.09.19
International Classification 分类号 H01L21/82;H01L21/283;H01L21/320
Applicant(s) Name
申请人		 Wanghong Electronics Co., Ltd.
Address 地址
Inventor(s) Name 发明人 Liang Mingzhong;Cai Xinyi
Attorney & Agent 代理人 wang huaqiang
More information 更  多  信  息


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