A process for preparing non-volatile memory includes providing a substrate having a long-strip stack structure on it, generating an embedded drain in the substrate at both sides of said stack structure, generating an insulating layer on the embedded drain, sequentially generating a Si layer and a top cover layer, vertically patterning said top cover layer, Si layer and stack structure to form several gate structures, generating a liner layer on the exposed Si layer, gate structure and substrate, removing top cover layer, and generating metallic silicide layer on the exposed silicon layer. |