Original document(28 pages)  中文版
    A non-volatile semiconductor memory device according to the present invention includes: a plurality of element isolation regions formed at predetermined intervals in the main surface of a semiconductor substrate; a first silicon oxide film, a nitride film and a second silicon oxide film formed on the semiconductor substrate; a word line formed on the second silicon oxide film; an interlayer insulating film formed on the word line; a plurality of bit lines formed on the interlayer insulating film in a plurality of regions positioned above the plurality of element isolation regions; and an interlayer insulating film formed between the bit lines. Accordingly, in this non-volatile semiconductor memory device, the withstand voltage between the bit lines increases and, therefore, the occurrence of current leakage can be prevented so that an improvement in performance can be implemented. In addition, the manufacturing cost can be lowered.
Application Number
申请号
02144357 Application Date
申请日
2002.10.10
Title 名称 Non-volatile semiconductor memory capable of enhancing bit line voltage resistance
Publication Number
公开号
1435887 Publication Date
公开日
2003.08.13
Approval Pub. Date Granted Pub. Date
International Classification 分类号 H01L27/10;H01L27/115
Applicant(s) Name
申请人
Mitsubishi Electric Corp.
Address 地址
Inventor(s) Name 发明人 Kato Hiroshi
Attorney & Agent 代理人 liu zongjie wang zhongzhong
More information 更  多  信  息


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