The invention provides a semiconductor memory device which is excellent in soft error resistance by adding a charge capacity to a cell node without increasing a cell area. In a semiconductor memory device with a full CMOS type memory cell, which has two n-type bulk access transistors and two n-type bulk driver transistors and two p-type bulk load transistors, respectively, a charge capacity body for charge capacity addition connected to a storage node is constituted of an insulation film and a conductive film, and the insulation film and the conductive film are formed directly on an upper side of the first and second cell nodes. |