| Original document(27 pages) Authorized document(26 pages) 中文版 |
Capacitors having increased capacitance include an enhanced-surface-area (rough-surfaced) electrically conductive layer or other layers that are compatible with the high-dielectric constant materials. In one approach, an enhanced-surface-area electrically conductive layer for such capacitors is formed by processing a ruthenium oxide layer at high temperature at or above 500 DEG C and low pressure 75 torr or below, most desirably 5 torr or below, to produce a roughened ruthenium layer having a textured surface with a mean feature size of at least about 100 Anstroms. The initial ruthenium oxide layer may be provided by chemical vapor deposition techniques or sputtering techniques or the like. The layer may be formed over an underlying electrically conductive layer. The processing may be performed in an inert ambient or in a reducing ambient. A nitrogen-supplying ambient or nitrogen-supplying reducing ambient may be used during the processing or afterwards to passivate the ruthenium for improved compatibility with high-dielectric constant dielectric materials. Processing in an oxidizing ambient may also be performed to passivate the roughened layer. The roughened layer of ruthenium may be used to form an enhanced-surface-area electrically conductive layer. The resulting enhanced-surface-area electrically conductive layer may form a plate of a storage capacitor in an integrated circuit, such as in a memory cell of a DRAM or the like. In another approach, a tungsten nitride layer is provided as a first electrode of such a capacitor. The capacitor, or at least the tungsten nitride layer, is annealed to increase the capacitance of the capacitor. |
Application Number
申请号 |
01810919 |
Application Date
申请日 |
2001.06.07 |
| Title 名称 |
Methods for forming and integrated circuit structures contg. ruthenium and tungsten contg. layers |
Publication Number
公开号 |
1436364 |
Publication Date
公开日 |
2003.08.13 |
| Approval Pub. Date |
2006.08.16 |
Granted Pub. Date |
2006.08.16 |
| International Classification 分类号 |
H01L21/02 |
Applicant(s) Name
申请人 |
Micron Technology, Inc. |
| Address 地址 |
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| Inventor(s) Name 发明人 |
Vishnu K. Agarwal;Garo Derderian;Gurtei S. Sandhu |
| Attorney & Agent 代理人 |
guan zhaohui zhang tianshu |
| More information 更 多 信 息 |
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