A DC-to-DC regulator that includes a multi-phase synchronous buck regulator having a pulse width modulator to generate a plurality of switching signals, a plurality of drivers, each coupled to receive one of the switching signals, and a plurality of switching voltage converters, each coupled to receive an output from one of the drivers and an input voltage, wherein the outputs of the switching voltage converters are combined to form an output voltage. The multi-phase synchronous buck regulator can be implemented on a motherboard, such as on an interposer board or directly on a PU chip. |