| Original document(33 pages) 中文版 |
Spacer structures of field effect transistor structures are enhanced at least in sections with immobile charge carriers. The charge accumulated in the spacer structures induces an enhancement zone of mobile charge carriers in the underlying semiconductor substrate. The enhancement zone reduces the resistance of a channel coupling between the respective source/drain region and a channel region of the respective field effect transistor structure, wherein the channel region being controlled by a potential of a gate electrode. Source/drain regions drawn back from the gate electrode of the field effect transistor structure reduce an overlap capacitance between the gate electrode and the respective source/drain regions. A method for fabricating transistor arrangements having n-FETs and p-FETs with enhanced spacer structures. |
Application Number
申请号 |
200610051519 |
Application Date
申请日 |
2006.02.28 |
| Title 名称 |
Field effect transistor with gate spacer structure and low-resistance channel coupling |
Publication Number
公开号 |
1855541 |
Publication Date
公开日 |
2006.11.01 |
| Approval Pub. Date |
|
Granted Pub. Date |
|
| International Classification 分类号 |
H01L29/78,H01L27/092,H01L21/336,H01L21/8238 |
Applicant(s) Name
申请人 |
Infineon Technologies AG |
| Address 地址 |
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| Inventor(s) Name 发明人 |
Goldbach Matthias |
| Attorney & Agent 代理人 |
su juan hu qiang |
| More information 更 多 信 息 |
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