| Original document(15 pages) 中文版 |
Disclosed method for forming void-free isolation comprises the steps of: forming a trench in an isolation region in a semiconductor substrate; and forming a filling oxide on the semiconductor substrate to fill the trench. The filling oxide is formed by HDP-CVD process and by using reactant gas mixture that includes O<2>, SiH<4> and He. In an embodiment of the present invention, the formation of the filling oxide is carried out in two-step process which includes: first filling the trench with the filling oxide under the first processing condition that a first D/S value has greater sputter etching rate than the deposition rate; and second filling the trench with the filling oxide under the second processing condition that a second D/S value is smaller than the first D/S value. Here the D/S value is defined as ''(net deposition rate+blanket sputter etching rate)/(blanket sputter etching rate)''. |
Application Number
申请号 |
200610109805 |
Application Date
申请日 |
2006.08.14 |
| Title 名称 |
Method for forming void-free trench isolation layer |
Publication Number
公开号 |
1913122 |
Publication Date
公开日 |
2007.02.14 |
| Approval Pub. Date |
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Granted Pub. Date |
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| International Classification 分类号 |
H01L21/762;H01L21/316 |
Applicant(s) Name
申请人 |
Dongbu Electronics Co., Ltd. |
| Address 地址 |
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| Inventor(s) Name 发明人 |
Park Kyung M. |
| Attorney & Agent 代理人 |
gu jinwei liu jifu |
| More information 更 多 信 息 |
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