A method for planarizing a semiconductor structure is disclosed. A semiconductor substrate having a first area and a second area in a second pattern density lower than the first pattern density, is provided. A first dielectric layer is formed above the semiconductor for covering the trenches in the first and second areas. A first chemical mechanical polishing is performed on the first dielectric layer using a predetermined type of slurry for reducing a thickness thereof. The first dielectric layer is then rinsed. A second chemical mechanical polishing is performed on the first dielectric layer using the predetermined type of slurry for further removing the first dielectric layer outside the trenches, thereby reducing a step height variation between surfaces of the first and second areas. Said method in the present can reduce a step height variation between high pattern density area and low pattern density area. |