Original document(21 pages)  中文版
    A semiconductor structure is fabricated to have a transistor cell region and a connection region. The transistors both of a transistor cell region and of a connection region are coated with a first oxide layer, the layer thickness of the first oxide layer being dimensioned in such a way that a gap region in each case remains present between the adjacent transistors in the transistor cell region. A sacrificial structure is subsequently applied between at least two adjacent transistors of the transistor cell region in the gap region. At least one gap region in each case remains free between two adjacent sacrificial structures. A second oxide layer is applied to the sacrificial structures and the first oxide layer. The first and second oxide layers are subjected to an etching step in which at least one spacer having a predetermined spacer width is formed on the side edges of at least one transistor of the connection region, the spacer being formed by the first and second oxide layers and the spacer width being determined by the layer thickness of the first and second oxide layers and also by the etching step.
Application Number
申请号
200610126640 Application Date
申请日
2006.08.31
Title 名称 Manufacturing method for semiconductor structure
Publication Number
公开号
1933127 Publication Date
公开日
2007.03.21
Approval Pub. Date Granted Pub. Date
International Classification 分类号 H01L21/8242;H01L21/822
Applicant(s) Name
申请人
Infineon Technologies AG
Address 地址
Inventor(s) Name 发明人
Attorney & Agent 代理人 zhangxue mei weijun
More information 更  多  信  息


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