This invention relates to a chip package body without core dielectric layers and its stacked chip package structure, in which, the body includes a pattern circuit layer, a chip, a welded-cover layer, a package colloid and many external connecting terminals, in which, the pattern circuit layer has a relative first surface and a second surface, the chip is set on the first surface and electrically connected to the circuit layer, the welded-cover layer is matched on the second surface and has multiple first open-ends to expose part regions of the pattern circuit layer, the package colloid with multiple through holes covers the pattern circuit layer and fixes the chip on it, the external connecting terminals are matched in the through holes and the conduction posts are connected to the circuit layer electrically. |