| Original document(29 pages) 中文版 |
The semiconductor circuit includes a voltage-controlled semiconductor device (N)N, the resistance value of which is controllable with a high voltage, the drain terminal of the N can be connected to the gate terminal (control terminal) of an output semiconductor device (NO) via a resistor (R), the source terminal of the N is connected to the emitter terminal of the NO, and the gate terminal of the N is connected to the collector terminal, which is the output terminal, of the NO. When the input terminal of the semiconductor circuit is at the Hi-level, the NO OFF. By connecting the output terminal of the NO to the high-potential-side of a high-voltage circuit disposed separately and the negative electrode of a control power supply (VDD) to the low-potential-side of the high-voltage circuit in the state, a desired high voltage is applied between the collector and emitter of the NO. Since a p-channel MOSFET (PD) is turned ON as the input terminal potential is changed over to the Lo-level and the high voltage is still being applied to the output terminal of the NO, the N is turned ON and the NO is brought into the ON-state, in which the current driving ability of the NO is low. The semiconductor circuit can protect the devices from an over voltage with a simple circuit configuration. |
Application Number
申请号 |
200610139515 |
Application Date
申请日 |
2006.09.15 |
| Title 名称 |
Semicoductor circuit, inverter circuit, semiconductor apparatus |
Publication Number
公开号 |
1933154 |
Publication Date
公开日 |
2007.03.21 |
| Approval Pub. Date |
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Granted Pub. Date |
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| International Classification 分类号 |
H01L27/02;H03K19/20;G09G3/288 |
Applicant(s) Name
申请人 |
Fuji Elec Device Tech Co., Ltd. |
| Address 地址 |
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| Inventor(s) Name 发明人 |
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| Attorney & Agent 代理人 |
zhangxin |
| More information 更 多 信 息 |
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