| Original document(17 pages) 中文版 |
A method of implementing and manufacturing a cyclic redundancy check circuit for a multi-channel communication system. The method includes creating a generation expression that generates cyclic redundancy check (CRC) bits that satisfies a cyclic redundancy check polynomial of a mono-channel serial communication system with respect to a first point in time, creating a generation expression with respect to points in time that are sequentially delayed as much as the number of multi-channels from the first point in time by applying each point in time to the generation expression, and embodying a circuit corresponding to the generation expression with respect to the most delayed point in time among the created generation expressions. The CRC circuit corresponding to the generation expression will have more modulo-2 adders (e.g., XOR gates) than the number of non-zero coefficients in the selected CRC polynomial. |
Application Number
申请号 |
200610080366 |
Application Date
申请日 |
2006.05.11 |
| Title 名称 |
Cyclic redundancy check circuit and communication system having the same for multi-channel communication |
Publication Number
公开号 |
1933605 |
Publication Date
公开日 |
2007.03.21 |
| Approval Pub. Date |
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Granted Pub. Date |
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| International Classification 分类号 |
H04N7/64 |
Applicant(s) Name
申请人 |
Samsung Electronics Co., Ltd. |
| Address 地址 |
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| Inventor(s) Name 发明人 |
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| Attorney & Agent 代理人 |
huangxiao lin wangzhi sen |
| More information 更 多 信 息 |
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