Phase locked loop circuit (PLL-circuit) comprising a phase comparator (30) for detecting a phase difference Phi between an input reference signal Uref and an input signal Up,in,wherein Kp is a phase detector gain of said phase comparator, a voltage controlled oscillator (VCO) for generating a periodic output signal Uvco,out having an angular frequency omegavco,out depending on an input signal Uvco, in, wherein Kvco is a voltage controlled oscillator gain of said voltage controlled oscillator, and a controller adapted to control the phase detector gain Kp during an operation of the phase locked loop circuit in such a way that a loop gain K:=Kp*Kvco remains within a predetermined range during the operation of the phase locked loop circuit. |